Electro‐Thermal Analysis of a Double‐Gate Vertical Tunnel Field‐Effect Transistor Under Multiple Power‐Dissipation Regimes
Ajeet Kumar; Bhubesh Chander Joshi
- Published
- Publisher
- Wiley
- Journal / collection
- Advanced Theory and Simulations
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.1002/adts.70556
The original publisher provides the full text and its access options.
Cite this source
Ajeet Kumar; Bhubesh Chander Joshi. Electro‐Thermal Analysis of a Double‐Gate Vertical Tunnel Field‐Effect Transistor Under Multiple Power‐Dissipation Regimes. Advanced Theory and Simulations. 2026-09. https://doi.org/10.1002/adts.70556