A Pass-Transistor Logic-Based Hybrid Approximate Full Adder Composition with Reduced Error
Yonghwan Choi; Jungu Kang; Yeongkyo Seo
- Published
- Publisher
- IEEE
- Journal / collection
- 2025 22nd International SoC Design Conference (ISOCC)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/isocc66390.2025.11329690
The original publisher provides the full text and its access options.
Cite this source
Yonghwan Choi; Jungu Kang; Yeongkyo Seo. A Pass-Transistor Logic-Based Hybrid Approximate Full Adder Composition with Reduced Error. 2025 22nd International SoC Design Conference (ISOCC). 2025-10-15. https://doi.org/10.1109/isocc66390.2025.11329690