Skip to content
Independent research & intelligence
OPEN VARIABLE

Evidence-First Signal Intelligence

Menu

Research literature / Conference paper

Highly stackable Oxide-semiconductor Channel Transistor Technology for Future High-density and Low-power 3D DRAM

Mutsumi Okajima; Takamitsu Ochi; Tsuyoshi Sugisaki; Takanori Akita; Fumiya Kimura; Kiichi Sato; Isamu Ujiie; Sota Mochizuki; Masayoshi Iwayama; Atsuko Sakata; Shinji Miyano; Kazuki Eshiro; Takafumi Masuda; Tomomasa Ueda; Nobuyoshi Saito; Keiji Ikeda

Published
Publisher
IEEE
Journal / collection
2025 IEEE International Electron Devices Meeting (IEDM)
Research area
Semiconductors
Source type
Conference paper
DOI
10.1109/iedm50572.2025.11353893

Read the original source ↗

The original publisher provides the full text and its access options.

Cite this source

Mutsumi Okajima; Takamitsu Ochi; Tsuyoshi Sugisaki; Takanori Akita; Fumiya Kimura; Kiichi Sato; Isamu Ujiie; Sota Mochizuki; Masayoshi Iwayama; Atsuko Sakata; Shinji Miyano; Kazuki Eshiro; Takafumi Masuda; Tomomasa Ueda; Nobuyoshi Saito; Keiji Ikeda. Highly stackable Oxide-semiconductor Channel Transistor Technology for Future High-density and Low-power 3D DRAM. 2025 IEEE International Electron Devices Meeting (IEDM). 2025-12-06. https://doi.org/10.1109/iedm50572.2025.11353893

Download RIS