Assessment on Nanosheet Transistor Variants Beyond 2nm Node
Chih-Hao Chang; P.C. Shen; V.S. Chang; K.T. Lai; C.S. Liang; B.F. Wu; T.C. Lin; J.A. Ng; C.Y. Chen; C.J. Lin; J.H. Lu; F.H. Su; C.P. Tsao; C.T. Li; Y.H. Chen; C.H. Hsieh; Y.H. Tseng; P.N. Chen; T.L. Lee; R. Chen
- Published
- Publisher
- IEEE
- Journal / collection
- 2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.23919/vlsitechnologyandcir65189.2025.11075146
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Cite this source
Chih-Hao Chang; P.C. Shen; V.S. Chang; K.T. Lai; C.S. Liang; B.F. Wu; T.C. Lin; J.A. Ng; C.Y. Chen; C.J. Lin; J.H. Lu; F.H. Su; C.P. Tsao; C.T. Li; Y.H. Chen; C.H. Hsieh; Y.H. Tseng; P.N. Chen; T.L. Lee; R. Chen. Assessment on Nanosheet Transistor Variants Beyond 2nm Node. 2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). 2025-06-08. https://doi.org/10.23919/vlsitechnologyandcir65189.2025.11075146