Investigation of Buried Channel Array Transistor as a Scalable High-Voltage Pass Transistor for 3-D NAND Flash Memory
Hyeun Woo Shin; Namju Kim; Chae Eun Kim; Suk-Kang Sung; Byung Chul Jang
- Published
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Journal / collection
- IEEE Transactions on Device and Materials Reliability
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.1109/tdmr.2026.3666272
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Cite this source
Hyeun Woo Shin; Namju Kim; Chae Eun Kim; Suk-Kang Sung; Byung Chul Jang. Investigation of Buried Channel Array Transistor as a Scalable High-Voltage Pass Transistor for 3-D NAND Flash Memory. IEEE Transactions on Device and Materials Reliability. 2026-03. https://doi.org/10.1109/tdmr.2026.3666272