GE-LLM: Graph-Enhanced Large Language Models for Efficient Transistor-Level Circuit Simulation
Chao Wang; Dan Niu; Yichao Dong; Dekang Zhang; Changyin Sun; Zhou Jin
- Published
- Publisher
- IEEE
- Journal / collection
- 2026 Design, Automation & Test in Europe Conference (DATE)
- Research area
- AI & compute
- Source type
- Conference paper
- DOI
- 10.23919/date69613.2026.11539692
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Cite this source
Chao Wang; Dan Niu; Yichao Dong; Dekang Zhang; Changyin Sun; Zhou Jin. GE-LLM: Graph-Enhanced Large Language Models for Efficient Transistor-Level Circuit Simulation. 2026 Design, Automation & Test in Europe Conference (DATE). 2026-04-20. https://doi.org/10.23919/date69613.2026.11539692