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Research and optimization of transistor-level anti-aging for low power single-transistor-clocked dual-edge-triggered flip flop

Xiaolong Zhao; Yongbo Cai; Meng Li; Qingqing Sun; Hao Zhu

Published
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Journal / collection
IEICE Electronics Express
Research area
Semiconductors
Source type
Journal article
DOI
10.1587/elex.22.20250447

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Cite this source

Xiaolong Zhao; Yongbo Cai; Meng Li; Qingqing Sun; Hao Zhu. Research and optimization of transistor-level anti-aging for low power single-transistor-clocked dual-edge-triggered flip flop. IEICE Electronics Express. 2025-10-10. https://doi.org/10.1587/elex.22.20250447

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