Performance Evaluation of FPGA, GPU, and CPU in FIR Filter Implementation for Semiconductor-Based Systems
Muhammet Arucu; Teodor Iliev
- Published
- Publisher
- MDPI AG
- Journal / collection
- Journal of Low Power Electronics and Applications
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.3390/jlpea15030040
The original publisher provides the full text and its access options.
Cite this source
Muhammet Arucu; Teodor Iliev. Performance Evaluation of FPGA, GPU, and CPU in FIR Filter Implementation for Semiconductor-Based Systems. Journal of Low Power Electronics and Applications. 2025-07-21. https://doi.org/10.3390/jlpea15030040