Cryogenic 22nm FD-SOI Circuit Measurements and Compact Modeling L-UTSOI: From Transistor-Level Effects to System Performance
Brian Martinez; Miltiadis Alepidis; Baptiste Jadot; Franck Badets; Yvain Thonnart; Xavier Jehl
- Published
- Publisher
- IEEE
- Journal / collection
- 2025 IEEE European Solid-State Electronics Research Conference (ESSERC)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/esserc66193.2025.11213957
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Cite this source
Brian Martinez; Miltiadis Alepidis; Baptiste Jadot; Franck Badets; Yvain Thonnart; Xavier Jehl. Cryogenic 22nm FD-SOI Circuit Measurements and Compact Modeling L-UTSOI: From Transistor-Level Effects to System Performance. 2025 IEEE European Solid-State Electronics Research Conference (ESSERC). 2025-09-08. https://doi.org/10.1109/esserc66193.2025.11213957