First Thorough Assessment of Time-Dependent Dielectric Breakdown in Sub-25 nm Gate-All-Around Vertical Ingazno Transistor for 4F 2 DRAM Application
Akinori Kamiyama; Shoichi Kabuyanagi; Masaya Toda; Tomoharu Okada; Satoshi Hasegawa; Takamasa Hamai; Ibuki Watanabe; Shino Sato; Kazuhiro Matsuo; Yusuke Kasahara; Keiko Ariyoshi; Ken-ichi Haga; Keiji Ikeda; Akihiro Kajita; Takayuki Tsukamoto; Shosuke Fujii
- Published
- Publisher
- IEEE
- Journal / collection
- 2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.23919/vlsitechnologyandcir65189.2025.11074913
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Akinori Kamiyama; Shoichi Kabuyanagi; Masaya Toda; Tomoharu Okada; Satoshi Hasegawa; Takamasa Hamai; Ibuki Watanabe; Shino Sato; Kazuhiro Matsuo; Yusuke Kasahara; Keiko Ariyoshi; Ken-ichi Haga; Keiji Ikeda; Akihiro Kajita; Takayuki Tsukamoto; Shosuke Fujii. First Thorough Assessment of Time-Dependent Dielectric Breakdown in Sub-25 nm Gate-All-Around Vertical Ingazno Transistor for 4F 2 DRAM Application. 2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). 2025-06-08. https://doi.org/10.23919/vlsitechnologyandcir65189.2025.11074913