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Research literature / Conference paper

Hybrid AI-Optimization Method for Latent Defect Detection Through Test Transistor Insertion in Analog Circuits

Sankhya Bhattacharya; Georges Gielen

Published
Publisher
IEEE
Journal / collection
2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD)
Research area
Semiconductors
Source type
Conference paper
DOI
10.1109/smacd65553.2025.11092178

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Sankhya Bhattacharya; Georges Gielen. Hybrid AI-Optimization Method for Latent Defect Detection Through Test Transistor Insertion in Analog Circuits. 2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD). 2025-07-07. https://doi.org/10.1109/smacd65553.2025.11092178

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