Effective Build-Up Substrate Design for Warpage Reduction and Reliability Enhancement in Advanced Semiconductor Packages
Daichi Okazaki; Eiji Baba; Yuto Inoue; Daisuke Hironiwa; Ikumi Sawa; YoungGun Han; Taka Kanayama; Atsunori Hattori; Kanta Nogita; Ryo Miyamoto
- Published
- Publisher
- IEEE
- Journal / collection
- 2025 IEEE 75th Electronic Components and Technology Conference (ECTC)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/ectc51687.2025.00148
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Cite this source
Daichi Okazaki; Eiji Baba; Yuto Inoue; Daisuke Hironiwa; Ikumi Sawa; YoungGun Han; Taka Kanayama; Atsunori Hattori; Kanta Nogita; Ryo Miyamoto. Effective Build-Up Substrate Design for Warpage Reduction and Reliability Enhancement in Advanced Semiconductor Packages. 2025 IEEE 75th Electronic Components and Technology Conference (ECTC). 2025-05-27. https://doi.org/10.1109/ectc51687.2025.00148