Large-scale gate-all-around MoS2 transistor array through lossless monolithic 3D integration
Chao Chen; Kuanglei Chen; Hang Zhao; Shucao Lu; Jinsen Shang; He Jiang; Li Gao; Xiaoyu He; Shihua Jiang; Zhangyi Chen; Zheng Zhang; Xiankun Zhang; Yue Zhang
- Published
- Publisher
- Oxford University Press (OUP)
- Journal / collection
- National Science Review
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.1093/nsr/nwaf539
The original publisher provides the full text and its access options.
Cite this source
Chao Chen; Kuanglei Chen; Hang Zhao; Shucao Lu; Jinsen Shang; He Jiang; Li Gao; Xiaoyu He; Shihua Jiang; Zhangyi Chen; Zheng Zhang; Xiankun Zhang; Yue Zhang. Large-scale gate-all-around MoS2 transistor array through lossless monolithic 3D integration. National Science Review. 2025-11-27. https://doi.org/10.1093/nsr/nwaf539