Design Space Folding: A "Free-lunch" Add-on for Efficient Design Convergence in Transistor Sizing
Zhuohua Liu; Yuxuan Zhang; Weilun Xie; Yuanqi Hu; Wei W. Xing
- Published
- Publisher
- IEEE
- Journal / collection
- 2025 International Symposium of Electronics Design Automation (ISEDA)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/iseda65950.2025.11100880
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Cite this source
Zhuohua Liu; Yuxuan Zhang; Weilun Xie; Yuanqi Hu; Wei W. Xing. Design Space Folding: A "Free-lunch" Add-on for Efficient Design Convergence in Transistor Sizing. 2025 International Symposium of Electronics Design Automation (ISEDA). 2025-05-09. https://doi.org/10.1109/iseda65950.2025.11100880