Transistor-Level Morris Sensitivity Analysis for Variation-Aware Delay Optimization in CMOS Full Adder
Pranavi Nikam; Jeevitha Gowda; Vignesh Mudaliyar; Poshanjeet Mandal
- Published
- Publisher
- IEEE
- Journal / collection
- 2026 IEEE 18th International Conference on Computational Intelligence and Communication Networks (CICN)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/cicn70047.2026.11594309
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Cite this source
Pranavi Nikam; Jeevitha Gowda; Vignesh Mudaliyar; Poshanjeet Mandal. Transistor-Level Morris Sensitivity Analysis for Variation-Aware Delay Optimization in CMOS Full Adder. 2026 IEEE 18th International Conference on Computational Intelligence and Communication Networks (CICN). 2026-06-12. https://doi.org/10.1109/cicn70047.2026.11594309