Transistor Placement for Automatic Cell Layout Generation on Advanced Nodes: A Review
Vitor H. Fuerstenau; Ricardo Reis
- Published
- Publisher
- IEEE
- Journal / collection
- 2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/vlsi-soc64688.2025.11421733
The original publisher provides the full text and its access options.
Cite this source
Vitor H. Fuerstenau; Ricardo Reis. Transistor Placement for Automatic Cell Layout Generation on Advanced Nodes: A Review. 2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC). 2025-10-12. https://doi.org/10.1109/vlsi-soc64688.2025.11421733