Controlled trap formation in SiC metal–oxide–semiconductor structures via gate bias stress and its impact on the performance of metal–oxide–semiconductor field-effect transistors
Takuma Kobayashi; Keiji Hachiken; Hirohisa Hirai; Mitsuru Sometani; Mitsuo Okamoto; Masahiro Hara; Heiji Watanabe
- Published
- Publisher
- AIP Publishing
- Journal / collection
- Journal of Applied Physics
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.1063/5.0337193
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Cite this source
Takuma Kobayashi; Keiji Hachiken; Hirohisa Hirai; Mitsuru Sometani; Mitsuo Okamoto; Masahiro Hara; Heiji Watanabe. Controlled trap formation in SiC metal–oxide–semiconductor structures via gate bias stress and its impact on the performance of metal–oxide–semiconductor field-effect transistors. Journal of Applied Physics. 2026-07-28. https://doi.org/10.1063/5.0337193