A $\mathbf{2 n m}$ Nanosheet $\mathbf{1 2 8 K b}$ Anti-Fuse One-Time-Programmable Memory Featuring Core-Transistor-Only High Voltage Program Circuit and Fault-Tolerant Design
Gu-Huan Li; Wan-Hsueh Cheng; Chen-Wei Liang; Shaun Chou; Perng-Fei Yuh; Li-Yu Yeh; Yen-Hsiang Huang; Yi-Ching Liu; Chungi Huang; Duncan Yang; Yih Wang; Tsung-Yung Jonathan Chang; Lien-Jung Hung; Ping-Wei Wang; Chin-Shan Hou; Hsin-Jou Chuang; An-Shun Teng; Li-Ling Luo; Jordan Hsu
- Published
- Publisher
- IEEE
- Journal / collection
- 2026 IEEE/JSAP Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/vlsitechnologyandcir65830.2026.11577623
The original publisher provides the full text and its access options.
Cite this source
Gu-Huan Li; Wan-Hsueh Cheng; Chen-Wei Liang; Shaun Chou; Perng-Fei Yuh; Li-Yu Yeh; Yen-Hsiang Huang; Yi-Ching Liu; Chungi Huang; Duncan Yang; Yih Wang; Tsung-Yung Jonathan Chang; Lien-Jung Hung; Ping-Wei Wang; Chin-Shan Hou; Hsin-Jou Chuang; An-Shun Teng; Li-Ling Luo; Jordan Hsu. A $\mathbf{2 n m}$ Nanosheet $\mathbf{1 2 8 K b}$ Anti-Fuse One-Time-Programmable Memory Featuring Core-Transistor-Only High Voltage Program Circuit and Fault-Tolerant Design. 2026 IEEE/JSAP Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). 2026-06-14. https://doi.org/10.1109/vlsitechnologyandcir65830.2026.11577623