Transistor Sizing Optimization of Full Adder Circuits Using Latest Metaheuristic Algorithms
Majid Amini-Valashani; Sattar Mirzakuchaki
- Published
- Publisher
- Springer Science and Business Media LLC
- Journal / collection
- Iranian Journal of Science and Technology, Transactions of Electrical Engineering
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.1007/s40998-025-00825-2
The original publisher provides the full text and its access options.
Cite this source
Majid Amini-Valashani; Sattar Mirzakuchaki. Transistor Sizing Optimization of Full Adder Circuits Using Latest Metaheuristic Algorithms. Iranian Journal of Science and Technology, Transactions of Electrical Engineering. 2025-05-30. https://doi.org/10.1007/s40998-025-00825-2