A Simple Layout Methodology to Increase the Electrical Safe-Operating Area (E-SOA) Boundary for Power Transistor
Chien-Wei Wang; Shih-Chieh Chien; Yu-Sheng Chiu; Jung-Tsun Chuang; Chieh-Yao Chuang; Chih-Fang Huang; Jian-Hsing Lee
- Published
- Publisher
- IEEE
- Journal / collection
- 2025 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/icce-taiwan66881.2025.11207962
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Cite this source
Chien-Wei Wang; Shih-Chieh Chien; Yu-Sheng Chiu; Jung-Tsun Chuang; Chieh-Yao Chuang; Chih-Fang Huang; Jian-Hsing Lee. A Simple Layout Methodology to Increase the Electrical Safe-Operating Area (E-SOA) Boundary for Power Transistor. 2025 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan). 2025-07-16. https://doi.org/10.1109/icce-taiwan66881.2025.11207962