Optimization and Performance Analysis of Pass Transistor Based Decoder Design Using 18nm FinFET and 45nm MOSFET Technologies
D. Mamatha; K.Nithya Poojaiah; K.Chaitanya Sai; O.Naveen Kumar; N.Hanumanth Reddy; M.Sai Ram Naik
- Published
- Publisher
- IEEE
- Journal / collection
- 2025 International Conference on Electronics, Computing, Communication and Control Technology (ICECCC)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/iceccc65144.2025.11063761
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Cite this source
D. Mamatha; K.Nithya Poojaiah; K.Chaitanya Sai; O.Naveen Kumar; N.Hanumanth Reddy; M.Sai Ram Naik. Optimization and Performance Analysis of Pass Transistor Based Decoder Design Using 18nm FinFET and 45nm MOSFET Technologies. 2025 International Conference on Electronics, Computing, Communication and Control Technology (ICECCC). 2025-05-01. https://doi.org/10.1109/iceccc65144.2025.11063761