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Research literature / Journal article

Trends in 45 nm Integrated Circuit Single-Event Upset Rates With Stacked-Transistor Layouts

Michael D. Hu; James M. Trippe; Robert A. Reed; Brian D. Sierawski; Dennis R. Ball; Jeffrey S. Kauppila; Lloyd W. Massengill; W. Timothy Holman

Published
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Journal / collection
IEEE Transactions on Nuclear Science
Research area
Semiconductors
Source type
Journal article
DOI
10.1109/tns.2025.3584671

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Michael D. Hu; James M. Trippe; Robert A. Reed; Brian D. Sierawski; Dennis R. Ball; Jeffrey S. Kauppila; Lloyd W. Massengill; W. Timothy Holman. Trends in 45 nm Integrated Circuit Single-Event Upset Rates With Stacked-Transistor Layouts. IEEE Transactions on Nuclear Science. 2026-04. https://doi.org/10.1109/tns.2025.3584671

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