Spec-driven Design and Verification of a Vertical Gate-All-around DRAM Access Transistor with an Open-source TCAD Workflow
Tee Hui Teo
- Published
- Publisher
- Elsevier BV
- Research area
- Semiconductors
- Source type
- Preprint / posted paper
- DOI
- 10.2139/ssrn.7535038
This is a preprint or other posted paper. Check the original source for its review and publication status.
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Cite this source
Tee Hui Teo. Spec-driven Design and Verification of a Vertical Gate-All-around DRAM Access Transistor with an Open-source TCAD Workflow. Elsevier BV. 2026. https://doi.org/10.2139/ssrn.7535038