Skip to content
OPEN VARIABLE

Evidence-First Signal Intelligence

Menu

Research literature / Conference paper

High-K, Gate-Stack Engineered, Junctionless, Nanowire Ferroelectric Field Effect Transistor (J-NW-Fe-Fet) with various catalytic metals for PH3 Sensing Applications

Shalu Garg; Jasdeep Kaur; Anubha Goel; Subhasis Haldar; R. S. Gupta

Published
Publisher
IEEE
Journal / collection
2025 Devices for Integrated Circuit (DevIC)
Research area
Semiconductors
Source type
Conference paper
DOI
10.1109/devic63749.2025.11012326

Read the original source ↗

The original publisher provides the full text and its access options.

Cite this source

Shalu Garg; Jasdeep Kaur; Anubha Goel; Subhasis Haldar; R. S. Gupta. High-K, Gate-Stack Engineered, Junctionless, Nanowire Ferroelectric Field Effect Transistor (J-NW-Fe-Fet) with various catalytic metals for PH3 Sensing Applications. 2025 Devices for Integrated Circuit (DevIC). 2025-04-05. https://doi.org/10.1109/devic63749.2025.11012326

Download RIS