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Research literature / Conference paper

Design and Analysis of Low-Power 10 Transistor Full Adders Using Novel XOR XNOR Gates

M Akshath; Kiran Kumar; Prashanth Kumar Shetty

Published
Publisher
IEEE
Journal / collection
2025 Second International Conference on Computing, Semiconductor, Mechatronics, Intelligent Systems and Communications (COSMIC)
Research area
Semiconductors
Source type
Conference paper
DOI
10.1109/cosmic67569.2025.11380860

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M Akshath; Kiran Kumar; Prashanth Kumar Shetty. Design and Analysis of Low-Power 10 Transistor Full Adders Using Novel XOR XNOR Gates. 2025 Second International Conference on Computing, Semiconductor, Mechatronics, Intelligent Systems and Communications (COSMIC). 2025-11-21. https://doi.org/10.1109/cosmic67569.2025.11380860

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