CMOS back-end-of-line integration of bilayer ferroelectric tunnel junction in 1-transistor-1-capacitor circuit
Keerthana Shajil Nair; Muhammad Hamid Raza; Catherine Dubourdieu; Veeresh Deshpande
- Published
- Publisher
- Elsevier BV
- Journal / collection
- Solid-State Electronics
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.1016/j.sse.2025.109255
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Cite this source
Keerthana Shajil Nair; Muhammad Hamid Raza; Catherine Dubourdieu; Veeresh Deshpande. CMOS back-end-of-line integration of bilayer ferroelectric tunnel junction in 1-transistor-1-capacitor circuit. Solid-State Electronics. 2025-12. https://doi.org/10.1016/j.sse.2025.109255