Physical Neural Network Compact Model for Fast and Flexible Transistor Modeling
Chien-Ting Tung; Jen-Hao Chen; Sayeef Salahuddin; Chenming Hu
- Published
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Research area
- AI & compute
- Source type
- Preprint / posted paper
- DOI
- 10.36227/techrxiv.174673029.93291786/v1
This is a preprint or other posted paper. Check the original source for its review and publication status.
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Cite this source
Chien-Ting Tung; Jen-Hao Chen; Sayeef Salahuddin; Chenming Hu. Physical Neural Network Compact Model for Fast and Flexible Transistor Modeling. Institute of Electrical and Electronics Engineers (IEEE). 2025-05-08. https://doi.org/10.36227/techrxiv.174673029.93291786/v1