Power Optimization in CMOS based EX-OR Gate using Pass Transistor Technique
Er. Priya Verma; Mukesh Tiwari
- Published
- Publisher
- IEEE
- Journal / collection
- 2024 5th International Conference on Smart Electronics and Communication (ICOSEC)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/icosec61587.2024.10722152
The original publisher provides the full text and its access options.
Cite this source
Er. Priya Verma; Mukesh Tiwari. Power Optimization in CMOS based EX-OR Gate using Pass Transistor Technique. 2024 5th International Conference on Smart Electronics and Communication (ICOSEC). 2024-09-18. https://doi.org/10.1109/icosec61587.2024.10722152