CMOS full adder cells based on modified full swing restored complementary pass transistor logic for energy efficient high speed arithmetic applications
Sriram Sundar S; Mahendran G
- Published
- Publisher
- Elsevier BV
- Journal / collection
- Integration
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.1016/j.vlsi.2023.102132
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Cite this source
Sriram Sundar S; Mahendran G. CMOS full adder cells based on modified full swing restored complementary pass transistor logic for energy efficient high speed arithmetic applications. Integration. 2024-03. https://doi.org/10.1016/j.vlsi.2023.102132