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Gate Layout and Process Reliability Co‐Optimization in High‐Speed Vertical III–V Nanowire Metal‐Oxide‐Semiconductor Field‐Effect Transistor Technology

Marcus E. Sandberg; Anette Löfstrand; Johannes Svensson; Lars Fhager

Published
Publisher
Wiley
Journal / collection
physica status solidi (a)
Research area
Semiconductors
Source type
Journal article
DOI
10.1002/pssa.202400690

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Marcus E. Sandberg; Anette Löfstrand; Johannes Svensson; Lars Fhager. Gate Layout and Process Reliability Co‐Optimization in High‐Speed Vertical III–V Nanowire Metal‐Oxide‐Semiconductor Field‐Effect Transistor Technology. physica status solidi (a). 2025-02-18. https://doi.org/10.1002/pssa.202400690

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