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Research literature / Conference paper

A Dual-Gate Vertical Channel IGZO Transistor for BEOL Stackable 3D Parallel Integration for Memory and Computing Applications

Ziyi Liu; Yiwei Dul; Renrong Liang; Zhigang Zhang; Liyang Pan; Jianshi Tang; Renrong Liang; Bin Gao; Qi Hu; Jun Xu; He Qian; Huaqiang Wu; Yuegang Zhang

Published
Publisher
IEEE
Journal / collection
2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
Research area
Semiconductors
Source type
Conference paper
DOI
10.1109/vlsitechnologyandcir46783.2024.10631472

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Ziyi Liu; Yiwei Dul; Renrong Liang; Zhigang Zhang; Liyang Pan; Jianshi Tang; Renrong Liang; Bin Gao; Qi Hu; Jun Xu; He Qian; Huaqiang Wu; Yuegang Zhang. A Dual-Gate Vertical Channel IGZO Transistor for BEOL Stackable 3D Parallel Integration for Memory and Computing Applications. 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). 2024-06-16. https://doi.org/10.1109/vlsitechnologyandcir46783.2024.10631472

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