An Ultra-Low-Power Static Contention-Free 25-Transistor True Single-Phase-Clocked Flip-Flop in 55 nm CMOS
Jiliang Liu; Huidong Zhao; Zhi Li; Kangning Wang; Shushan Qiao
- Published
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Journal / collection
- IEEE Access
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.1109/access.2024.3432162
The original publisher provides the full text and its access options.
Cite this source
Jiliang Liu; Huidong Zhao; Zhi Li; Kangning Wang; Shushan Qiao. An Ultra-Low-Power Static Contention-Free 25-Transistor True Single-Phase-Clocked Flip-Flop in 55 nm CMOS. IEEE Access. 2024. https://doi.org/10.1109/access.2024.3432162