Impact of Transistor Dimensions on the Performance of Multi-Level Programming Algorithms in 1T1R RRAM Devices
Eduardo Pérez; Andrea Baroni; Emilio Perez-Bosch Quesada; Keerthi Dorai Swamy Reddy; Stefan Pechmann; Max Uhlmann; Amelie Hagelauer; Christian Wenger
- Published
- Publisher
- Elsevier BV
- Research area
- Semiconductors
- Source type
- Preprint / posted paper
- DOI
- 10.2139/ssrn.5440551
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Cite this source
Eduardo Pérez; Andrea Baroni; Emilio Perez-Bosch Quesada; Keerthi Dorai Swamy Reddy; Stefan Pechmann; Max Uhlmann; Amelie Hagelauer; Christian Wenger. Impact of Transistor Dimensions on the Performance of Multi-Level Programming Algorithms in 1T1R RRAM Devices. Elsevier BV. 2025. https://doi.org/10.2139/ssrn.5440551