A 2.1-ns Dead Time 5-μm Single Photon Avalanche Diode with 2-Layer Transistor Pixel Technology
J. Ogi; S. Kitamura; F. Sugaya; J. Suzuki; A. Magori; T. Matsui; K. Sumita; Y. Ushiku; K. Moriyama; K. Toshima; T. Namise; H. Ozawa; Y. Tsukuda; Y. Otake; H. Hiyama; S. Matsumoto; A. Suzuki; F. Koga
- Published
- Publisher
- IEEE
- Journal / collection
- 2024 IEEE International Electron Devices Meeting (IEDM)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/iedm50854.2024.10873462
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Cite this source
J. Ogi; S. Kitamura; F. Sugaya; J. Suzuki; A. Magori; T. Matsui; K. Sumita; Y. Ushiku; K. Moriyama; K. Toshima; T. Namise; H. Ozawa; Y. Tsukuda; Y. Otake; H. Hiyama; S. Matsumoto; A. Suzuki; F. Koga. A 2.1-ns Dead Time 5-μm Single Photon Avalanche Diode with 2-Layer Transistor Pixel Technology. 2024 IEEE International Electron Devices Meeting (IEDM). 2024-12-07. https://doi.org/10.1109/iedm50854.2024.10873462