Optimizing Semiconductor Circuit Layout Design Using Generative Adversarial Networks
Hao Yang
- Published
- Publisher
- Elsevier BV
- Journal / collection
- Procedia Computer Science
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.1016/j.procs.2025.04.323
The original publisher provides the full text and its access options.
Cite this source
Hao Yang. Optimizing Semiconductor Circuit Layout Design Using Generative Adversarial Networks. Procedia Computer Science. 2025. https://doi.org/10.1016/j.procs.2025.04.323