Investigation and Analysis of Dual Metal Gate Overlap on Drain Side Tunneling Field Effect Transistor with Spacer in 10nm Node
S. Howldar; B. Balaji; K. Srinivasa Rao
- Published
- Publisher
- International Digital Organization for Scientific Information (IDOSI)
- Journal / collection
- International Journal of Engineering
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.5829/ije.2024.37.05b.07
The original publisher provides the full text and its access options.
Cite this source
S. Howldar; B. Balaji; K. Srinivasa Rao. Investigation and Analysis of Dual Metal Gate Overlap on Drain Side Tunneling Field Effect Transistor with Spacer in 10nm Node. International Journal of Engineering. 2024. https://doi.org/10.5829/ije.2024.37.05b.07