Effect of solder junction void variation in power semiconductor package on power cycle lifetime
Hiroshi Onodera; Nobuyuki Shishido; Daisuke Asari; Hiroshi Isono; Wataru Saito
- Published
- Publisher
- Elsevier BV
- Journal / collection
- Microelectronics Reliability
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.1016/j.microrel.2024.115471
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Cite this source
Hiroshi Onodera; Nobuyuki Shishido; Daisuke Asari; Hiroshi Isono; Wataru Saito. Effect of solder junction void variation in power semiconductor package on power cycle lifetime. Microelectronics Reliability. 2024-10. https://doi.org/10.1016/j.microrel.2024.115471