Challenges of Semiconductor Micro Via Fabrication Technology for 3D Chiplet Interconnect
Yasuhiro Morikawa
- Published
- Publisher
- IEEE
- Journal / collection
- 2024 Conference of Science and Technology for Integrated Circuits (CSTIC)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/cstic61820.2024.10532090
The original publisher provides the full text and its access options.
Cite this source
Yasuhiro Morikawa. Challenges of Semiconductor Micro Via Fabrication Technology for 3D Chiplet Interconnect. 2024 Conference of Science and Technology for Integrated Circuits (CSTIC). 2024-03-17. https://doi.org/10.1109/cstic61820.2024.10532090