Impact of Buffer Layer on Mos2/Cips Vdw Ncfet Logic Transistor
Blessing Meshach Dason; N Kasthuri; D NIRMAL
- Published
- Publisher
- Elsevier BV
- Research area
- Semiconductors
- Source type
- Preprint / posted paper
- DOI
- 10.2139/ssrn.4783067
This is a preprint or other posted paper. Check the original source for its review and publication status.
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Cite this source
Blessing Meshach Dason; N Kasthuri; D NIRMAL. Impact of Buffer Layer on Mos2/Cips Vdw Ncfet Logic Transistor. Elsevier BV. 2024. https://doi.org/10.2139/ssrn.4783067