Enhancement-Mode Multichannel MoS 2 Transistor with Spacer Engineering and Design-Technology Co-Optimization Based on the 8″ Platform
Jiadi Zhu; Aijia Yao; Peng Wu; Yixuan Jiao; Ji-Hoon Park; Jianfeng Jiang; Tilo H. Yang; Ayush S. Gupta; Suraj S. Cheema; Jing Kong; Tomás Palacios
- Published
- Publisher
- IEEE
- Journal / collection
- 2024 IEEE International Electron Devices Meeting (IEDM)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/iedm50854.2024.10873441
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Cite this source
Jiadi Zhu; Aijia Yao; Peng Wu; Yixuan Jiao; Ji-Hoon Park; Jianfeng Jiang; Tilo H. Yang; Ayush S. Gupta; Suraj S. Cheema; Jing Kong; Tomás Palacios. Enhancement-Mode Multichannel MoS 2 Transistor with Spacer Engineering and Design-Technology Co-Optimization Based on the 8″ Platform. 2024 IEEE International Electron Devices Meeting (IEDM). 2024-12-07. https://doi.org/10.1109/iedm50854.2024.10873441