3.9 A 1.2V High-Voltage-Tolerant Bootstrapped Analog Sampler in 12-bit SAR ADC Using 3nm GAA’s 0.7V Thin-Gate-Oxide Transistor
Sangheon Lee; Jinwoo Park; Junsang Park; Sangkyu Lee; Jungho Lee; Youngjae Cho; Michael Choi; Jongshin Shin
- Published
- Publisher
- IEEE
- Journal / collection
- 2024 IEEE International Solid-State Circuits Conference (ISSCC)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/isscc49657.2024.10454351
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Cite this source
Sangheon Lee; Jinwoo Park; Junsang Park; Sangkyu Lee; Jungho Lee; Youngjae Cho; Michael Choi; Jongshin Shin. 3.9 A 1.2V High-Voltage-Tolerant Bootstrapped Analog Sampler in 12-bit SAR ADC Using 3nm GAA’s 0.7V Thin-Gate-Oxide Transistor. 2024 IEEE International Solid-State Circuits Conference (ISSCC). 2024-02-18. https://doi.org/10.1109/isscc49657.2024.10454351