A Power Transistor Active Gate Driver With Two-Level Miller Plateau Detection and Driving Device Equalization Using 180-nm HV BCD Process
Chua-Chin Wang; Pradyumna Vellanki; Venkata Naveen Kolakaluri; L S S Pavan Kumar Chodisetti; Lean Karlo Santos Tolentino; Mitch Ming-Chi Chou; Oliver Lexter July Alvarez Jose
- Published
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Journal / collection
- IEEE Open Journal of Circuits and Systems
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.1109/ojcas.2025.3591630
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Chua-Chin Wang; Pradyumna Vellanki; Venkata Naveen Kolakaluri; L S S Pavan Kumar Chodisetti; Lean Karlo Santos Tolentino; Mitch Ming-Chi Chou; Oliver Lexter July Alvarez Jose. A Power Transistor Active Gate Driver With Two-Level Miller Plateau Detection and Driving Device Equalization Using 180-nm HV BCD Process. IEEE Open Journal of Circuits and Systems. 2025. https://doi.org/10.1109/ojcas.2025.3591630