Two-Phase Transistor Sizing for FPGAs via Bayesian Optimization
Xianfeng Cao; Huizhen Kuang; Yuanqi Wang; Lingli Wang
- Published
- Publisher
- ACM
- Journal / collection
- Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1145/3706628.3708825
The original publisher provides the full text and its access options.
Cite this source
Xianfeng Cao; Huizhen Kuang; Yuanqi Wang; Lingli Wang. Two-Phase Transistor Sizing for FPGAs via Bayesian Optimization. Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays. 2025-02-27. https://doi.org/10.1145/3706628.3708825