Hardened latch designs based on the characteristic of transistor for mitigating multiple-node-upsets in harsh radiation environments
Hui Xu; Chaoming Liu; Ruijun Ma; Tai Song; Zhengfeng Huang; Jun Wang; Xuewei Qin; Yu Xia
- Published
- Publisher
- Elsevier BV
- Journal / collection
- Microelectronics Journal
- Research area
- Semiconductors
- Source type
- Journal article
- DOI
- 10.1016/j.mejo.2023.106031
The original publisher provides the full text and its access options.
Cite this source
Hui Xu; Chaoming Liu; Ruijun Ma; Tai Song; Zhengfeng Huang; Jun Wang; Xuewei Qin; Yu Xia. Hardened latch designs based on the characteristic of transistor for mitigating multiple-node-upsets in harsh radiation environments. Microelectronics Journal. 2024-01. https://doi.org/10.1016/j.mejo.2023.106031