Design and Analysis of 4 Bit Multipliers Using Pass Transistor Logic and Gate Diffusion Input Technique Using 18nm FinFET Technology
Pavithara P; Ramesh M; Prabu M; Kavin Kumar K; Ponmurugan P; Udaya Suriyan V
- Published
- Publisher
- IEEE
- Journal / collection
- 2024 7th International Conference on Devices, Circuits and Systems (ICDCS)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/icdcs59278.2024.10561038
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Cite this source
Pavithara P; Ramesh M; Prabu M; Kavin Kumar K; Ponmurugan P; Udaya Suriyan V. Design and Analysis of 4 Bit Multipliers Using Pass Transistor Logic and Gate Diffusion Input Technique Using 18nm FinFET Technology. 2024 7th International Conference on Devices, Circuits and Systems (ICDCS). 2024-04-23. https://doi.org/10.1109/icdcs59278.2024.10561038