Development of Low Power Energy Efficient 32nm SRAM Utilizing Sleep Transistor Technology
Mahendran N; Harshini M; Arthi S; Bhavadharani K; Booma R
- Published
- Publisher
- IEEE
- Journal / collection
- 2024 10th International Conference on Advanced Computing and Communication Systems (ICACCS)
- Research area
- Semiconductors
- Source type
- Conference paper
- DOI
- 10.1109/icaccs60874.2024.10717063
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Cite this source
Mahendran N; Harshini M; Arthi S; Bhavadharani K; Booma R. Development of Low Power Energy Efficient 32nm SRAM Utilizing Sleep Transistor Technology. 2024 10th International Conference on Advanced Computing and Communication Systems (ICACCS). 2024-03-14. https://doi.org/10.1109/icaccs60874.2024.10717063